Improper Access ControlWeakness · CWE-284

CVE-2025-0040

MEDIUM · 5.3 CVSS v4.0 Published 2026-05-15
Mitigation only
No fix yet — a mitigation exists. There is no fixed release. A documented workaround reduces exposure in the meantime.
See remediation →
58/100
Remediation priority · Elevated
No privileges Zero-click

Official description Straight from the sourceThe vendor's or NVD's own wording, published unedited. Authoritative, but often terse — it says what broke, rarely what to do.

NVD · unedited
Improper access control between the Joint Test Action Group (JTAG) and Advanced Extensible Interface (AXI) could allow an attacker with physical access to read or overwrite the contents of cross-chip debug (XCD) registers potentially resulting in loss of data integrity or confidentiality.

Technical summary Written by usOur analysis, written from the advisory, the CVSS vector and the affected-version data. It adds context the advisory leaves out, and never invents facts that are not in the source.

dbcve analysis · moderate confidence

This vulnerability involves improper access control between the JTAG debug interface and the AXI memory bus. An attacker with physical access can exploit this to read or overwrite cross-chip debug (XCD) registers, potentially exposing or corrupting sensitive data.

MitigationImplement proper access control checks between JTAG and AXI interfaces to restrict debug register access. Disable or password-protect JTAG when not in use, and consider hardware-level isolation of debug interfaces from sensitive AXI memory regions.

Verify against the referenced sources before acting — the references below are authoritative for this CVE, this summary is not.

CVSS breakdown How the score is builtThe industry scoring standard. It rates how the flaw is reached, what it takes to exploit, and what an attacker gains — the score is derived from those, not the other way round.

From the vector
Attack vector
Physical
Complexity
High
Privileges
None
Authentication
X
User interaction
None
Scope
X

CVSS:4.0/AV:P/AC:H/AT:P/PR:N/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X

Am I affected? How to checkSteps we derive from the advisory and the affected-version data, so you can decide whether this CVE reaches your setup. They are a guide, not a scan — your own configuration is the authority.

dbcve checks

Work through these to decide whether this CVE applies to you.

  1. Verify JTAG debug interface status
    Inspect the hardware debug configuration registers or device firmware settings to determine if the JTAG interface is enabled and accessible. On many SoCs, this is controlled via the Debug Enable (DBGEN) or similar pin/setting.
    Affected if JTAG is enabled without additional access restrictions or password protection
  2. Check AXI-to-JTAG access control configuration
    Review the debug security configuration registers (often found in System-on-Chip documentation under debug/trace settings) to verify whether explicit access control exists between the JTAG master and AXI bus transactions.
    Affected if No access control policy is defined or configured between JTAG and AXI interfaces
  3. Inspect cross-chip debug (XCD) register protections
    Query or examine the XCD control registers to determine whether read/write restrictions are enforced on cross-chip debug pathways. Look for bits controlling XCD region isolation.
    Affected if XCD registers are exposed without read/write permission checks or are mapped into accessible memory regions
  4. Verify debug port isolation from sensitive AXI memory
    Check hardware design documentation or device configuration to confirm whether debug interfaces are physically or logically isolated from AXI regions containing sensitive data (secure boot, encryption keys, etc.).
    Affected if Debug interfaces have direct AXI bus access to protected or sensitive memory regions without isolation gates

A system is affected if JTAG is enabled without access controls and the AXI memory bus can be accessed through debug interfaces to expose or modify XCD registers.

Generated from the published advisory. Verify against your own configuration.

Check your environment

Paste your version and any relevant configuration and it will be compared against the affected criteria above. Do not include secrets or credentials.

AI-assisted, checked against the advisory. Informational, not a guarantee.

Remediation Closing itWhat it takes to close this. Where a vendor fix exists we point at it; where none exists we say so plainly, and can build one. Effort estimates are scoped from the advisory, not from your codebase.

From vendor data
Mitigation available No clean upgrade yet — mitigate in the meantime
Mitigation

Implement proper access control checks between JTAG and AXI interfaces to restrict debug register access. Disable or password-protect JTAG when not in use, and consider hardware-level isolation of debug interfaces from sensitive AXI memory regions.

Have this fixed Scoped from the published advisory
  • Consultation4.0 h
  • Implementation16.0 h
  • Testing8.0 h
  • Review / QA4.0 h
32.0 hours of engineering $5,600
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Scan for this in your stack

Free · runs locally
dbcve dependency scanner

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References Go to the primary sourcePrimary sources — vendor advisories, patches and trackers. Where our summary and a reference disagree, the reference wins.

Primary sources

Practitioner notes

Contributed

Peer-ranked notes from engineers who’ve handled CVE-2025-0040 in production — separate from our analysis above.

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What this is

A place for practitioners to share what actually worked: a mitigation you’ve tested, a configuration change, a version- or environment-specific caveat, or a link to a verified patch. The most useful notes rise to the top as peers upvote them, so the signal stays high.

What belongs here
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  • Version or environment caveats, and links to real fixes
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