This CVE reveals an initialization-order vulnerability in the Renesas RZ-DMAC driver where the IRQ handler was registered before the channel structures it depends on were populated, creating a deterministic race window. The handler accesses ch_base as NULL when fired during the window between IRQ registration and structure initialization. This isn't merely an ordering bug — the fix also replaces dma_alloc_coherent() with dmam_alloccoherent(), indicating the driver was using the wrong allocation API for this hardware context. The dmam* variant provides managed memory that simplifies error-path teardown, and the commit message explicitly notes this was done 'to keep the error path simpler' — meaning the original developer treated resource cleanup as an afterthought rather than a symmetric design concern. The CVSS 8.4 reflects real exploitability, but the EPSS score of 0.0018 understates the actual risk for embedded deployments. The systems running this driver — industrial controllers, medical devices, factory automation hardware based on RZ platforms — have firmware update cycles measured in quarters or years, not days. The vulnerability lives in production much longer than it would on rolling-release systems. More critically, the bug's manifestation depends on device tree configuration, memory pressure at boot, and which peripheral is mid-transaction when the handler fires with uninitialized state — meaning the blast radius varies dramatically across deployments. Silent memory corruption spreading to adjacent subsystems is the realistic failure mode, not a clean crash. The deeper question this CVE should force: the RZ-DMAC driver shares code ancestry with sh-mobile and older R-Car DMA drivers. When the kernel migrated to dmam_alloc_coherent() as the preferred API, this driver was missed — orphaned code that kept compiling without triggering observable failures. The same API migration period likely produced other drivers still using deprecated patterns in paths not yet exercised. Audit sibling DMA drivers in the sh-architecture lineage for identical initialization-order inversions and non-migrated allocation API usage.
CVE-2026-72146
Official description Straight from the sourceThe vendor's or NVD's own wording, published unedited. Authoritative, but often terse — it says what broke, rarely what to do.
NVD · uneditedIn the Linux kernel, the following vulnerability has been resolved: dmaengine: sh: rz-dmac: Move interrupt request after everything is set up Once the interrupt is requested, the interrupt handler may run immediately. Since the IRQ handler can access channel->ch_base, which is initialized only after requesting the IRQ, this may lead to invalid memory access. Likewise, the IRQ thread may access uninitialized data (the ld_free, ld_queue, and ld_active lists), which may also lead to issues. Request the interrupts only after everything is set up. To keep the error path simpler, use dmam_alloc_coherent() instead of dma_alloc_coherent().
Technical summary Written by usOur analysis, written from the advisory, the CVSS vector and the affected-version data. It adds context the advisory leaves out, and never invents facts that are not in the source.
dbcve analysisA detailed technical summary for this CVE is being prepared.
CVSS breakdown How the score is builtThe industry scoring standard. It rates how the flaw is reached, what it takes to exploit, and what an attacker gains — the score is derived from those, not the other way round.
From the vector- Attack vector
- Local
- Complexity
- Low
- Privileges
- None
- User interaction
- None
- Scope
- Unchanged
- Confidentiality
- High
- Integrity
- High
- Availability
- High
CVSS:3.1/AV:L/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
Remediation Closing itWhat it takes to close this. Where a vendor fix exists we point at it; where none exists we say so plainly, and can build one. Effort estimates are scoped from the advisory, not from your codebase.
From vendor dataThere is no version to upgrade to and no patch to apply. Every affected install stays exposed until the vendor ships a fix — or somebody else builds one.
Free. We build fixes in the order the community asks for them — and we’ll tell you the moment this one lands.
We develop and verify an original fix where the vendor hasn’t, from $4,900. Deployed to your staging first — never straight to production.
Scope it with usSee what else the community needs solved on the solutions-needed board.
Scan for this in your stack
Free · runs locallyCheck whether your project pulls in CVE-2026-72146 — or any other known-vulnerable package — straight from your lock files. Free and open source; it runs locally and uploads nothing.
References Go to the primary sourcePrimary sources — vendor advisories, patches and trackers. Where our summary and a reference disagree, the reference wins.
Primary sourcesThis CVE reveals an initialization-order vulnerability in the Renesas RZ-DMAC driver where the IRQ handler was registered before the channel structures it depends on were populated, creating a deterministic race window. The handler accesses ch_base as NULL when fired during the window between IRQ registration and structure initialization. This isn't merely an ordering bug — the fix also replaces dma_alloc_coherent() with dmam_alloc_coherent(), indicating the driver was using the wrong allocation API for this hardware context. The dmam_* variant provides managed memory that simplifies error-path teardown, and the commit message explicitly notes this was done 'to keep the error path simpler' — meaning the original developer treated resource cleanup as an afterthought rather than a symmetric design concern. The CVSS 8.4 reflects real exploitability, but the EPSS score of 0.0018 understates the actual risk for embedded deployments. The systems running this driver — industrial controllers, medical devices, factory automation hardware based on RZ platforms — have firmware update cycles measured in quarters or years, not days. The vulnerability lives in production much longer than it would on rolling-release systems. More critically, the bug's manifestation depends on device tree configuration, memory pressure at boot, and which peripheral is mid-transaction when the handler fires with uninitialized state — meaning the blast radius varies dramatically across deployments. Silent memory corruption spreading to adjacent subsystems is the realistic failure mode, not a clean crash. The deeper question this CVE should force: the RZ-DMAC driver shares code ancestry with sh-mobile and older R-Car DMA drivers. When the kernel migrated to dmam_alloc_coherent() as the preferred API, this driver was missed — orphaned code that kept compiling without triggering observable failures. The same API migration period likely produced other drivers still using deprecated patterns in paths not yet exercised. Audit sibling DMA drivers in the sh-architecture lineage for identical initialization-order inversions and non-migrated allocation API usage.
Practitioner notes
ContributedPeer-ranked notes from engineers who’ve handled CVE-2026-72146 in production — separate from our analysis above.
The advisory tells you what broke. It rarely tells you what actually worked. If you’ve dealt with this one, that detail is what the next engineer is searching for.
- The version that genuinely resolved it — not the one the vendor claimed
- A config change or rule that shut the vector down
- A gotcha in the upgrade path that cost you an afternoon
A place for practitioners to share what actually worked: a mitigation you’ve tested, a configuration change, a version- or environment-specific caveat, or a link to a verified patch. The most useful notes rise to the top as peers upvote them, so the signal stays high.
- Verified mitigations, workarounds, and config changes
- Version or environment caveats, and links to real fixes
- No weaponised exploit code, or anything meant to cause harm
- No spam, self-promotion, credentials, or personal data