CVE-2021-26332
Official description Straight from the sourceThe vendor's or NVD's own wording, published unedited. Authoritative, but often terse — it says what broke, rarely what to do.
NVD · uneditedFailure to verify SEV-ES TMR is not in MMIO space, SEV-ES FW could result in a potential loss of integrity or availability.
Technical summary Written by usOur analysis, written from the advisory, the CVSS vector and the affected-version data. It adds context the advisory leaves out, and never invents facts that are not in the source.
dbcve analysis · moderate confidenceAMD SEV-ES (Secure Encrypted Virtualization-Encrypted State) firmware fails to verify that the Trusted Memory Region (TMR) is not located in Memory-Mapped I/O (MMIO) space. This validation failure could allow an attacker to place the TMR in MMIO, potentially leading to loss of integrity or availability of the encrypted VM state.
Verify against the referenced sources before acting — the references below are authoritative for this CVE, this summary is not.
Affected products & versions What the vendor confirmedThe version ranges the vendor confirmed as vulnerable. If your version sits inside a range here, treat yourself as exposed until you have upgraded.
NVD · CPE data< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4< milanpi-sp3_1.0.0.4CVSS breakdown How the score is builtThe industry scoring standard. It rates how the flaw is reached, what it takes to exploit, and what an attacker gains — the score is derived from those, not the other way round.
From the vector- Attack vector
- Local
- Complexity
- Low
- Privileges
- Low
- User interaction
- None
- Scope
- Unchanged
- Confidentiality
- None
- Integrity
- High
- Availability
- High
CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:N/I:H/A:H
Am I affected? How to checkSteps we derive from the advisory and the affected-version data, so you can decide whether this CVE reaches your setup. They are a guide, not a scan — your own configuration is the authority.
dbcve checksWork through these to decide whether this CVE applies to you.
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Identify the AMD Epyc processor modelRun 'dmidecode -t processor' or 'cat /proc/cpuinfo' to identify the processor model. Alternatively, use 'cpuid' or check the hypervisor inventory to confirm the specific Epyc model (7763, 7713p, 7713, 7663, 7643, 75f3, 7543p, or 7543).Affected if The processor is one of the listed affected Epyc models and the firmware version is below milanpi-sp3_1.0.0.4.
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Check the platform firmware versionQuery the system management interface or BIOS/UEFI for the firmware build string. For cloud environments, retrieve this via the provider API (for example, 'aws ec2 describe-instance-types' or similar). Look for a version string containing 'milanpi-sp3'.Affected if The firmware version string contains 'milanpi-sp3' with a version lower than 1.0.0.4.
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Verify SEV-ES is enabled in the hypervisor or cloud configurationCheck the hypervisor configuration or VM launch parameters for SEV-ES encryption settings. In Linux, inspect 'cat /sys/firmware/sev' or equivalent SEV capability files if available. For cloud VMs, review the instance metadata or launch configuration for SEV-ES/SEV encryption flags.Affected if SEV-ES is actively enabled for the virtual machine or container workload.
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Inspect the Trusted Memory Region (TMR) allocationExamine the hypervisor or cloud platform configuration that defines the TMR location. In on-premise environments, review the SEV-ES setup documentation or management interface for the TMR base address. In cloud environments, this may require provider-specific tooling or support access.Affected if The TMR is configured to reside in a memory region that falls within MMIO address ranges (typically above the system memory boundary).
The environment is affected if an affected Epyc model runs firmware below milanpi-sp3_1.0.0.4, SEV-ES is enabled, and the TMR is configured in or could be placed into MMIO space.
Generated from the published advisory. Verify against your own configuration.
Remediation Closing itWhat it takes to close this. Where a vendor fix exists we point at it; where none exists we say so plainly, and can build one. Effort estimates are scoped from the advisory, not from your codebase.
dbcve · scopedApply AMD-provided firmware/microcode updates that add proper validation to ensure the TMR cannot be located in MMIO space. Organizations using SEV-ES should coordinate with their hypervisor/cloud provider to ensure the patched firmware is deployed.
milanpi-sp3_1.0.0.4 or later
- Obtain the firmware update from the AMD website or your system vendor supporting the milanpi-sp3_1.0.0.4 release or later
- Apply the firmware update to the AMD Epyc processor following your vendor's standard firmware update procedures
- Verify the firmware has been successfully applied and the system boots normally
- Confirm SEV-ES is functioning properly with the updated firmware
Generated from the published advisory — verify against the referenced sources before acting.
- Consultation4.0 h
- Implementation2.0 h
- Testing4.0 h
- Review / QA2.0 h
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Scan for this in your stack
Free · runs locallyCheck whether your project pulls in CVE-2021-26332 — or any other known-vulnerable package — straight from your lock files. Free and open source; it runs locally and uploads nothing.
References Go to the primary sourcePrimary sources — vendor advisories, patches and trackers. Where our summary and a reference disagree, the reference wins.
Primary sourcesPractitioner notes
ContributedPeer-ranked notes from engineers who’ve handled CVE-2021-26332 in production — separate from our analysis above.
The advisory tells you what broke. It rarely tells you what actually worked. If you’ve dealt with this one, that detail is what the next engineer is searching for.
- The version that genuinely resolved it — not the one the vendor claimed
- A config change or rule that shut the vector down
- A gotcha in the upgrade path that cost you an afternoon
No notes yet
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- Version or environment caveats, and links to real fixes
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